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USRP母板上处理器的作用

The aeMB processor is a fully synthesized CPU that forms the heart of the USRP2 FPGA system-on-a-chip design. It performs configuration and status reporting for all the FPGA peripherals, manages the control channel for the GbE transport, and handles RF daughterboard operation. It does not perform any DSP functions; these are done purely in logic in the DSP RX and TX pipelines. It is clocked at 50 MHz, half the system clock rate.

最后更新:2017-04-03 05:40:07

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